The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC manufacturing are needed. For example, an advanced process for forming trench isolation structure, such as a shallow trench isolation (STI) structure, is required because the trench isolation structure may be attacked by subsequent wet cleaning processes. The wet cleaning processes may, therefore, result a different step heights of trench isolation structures within dense areas and isolation areas and increase the process complexity. In addition, the wet cleaning processes may result in divots in trench isolation structures and induce gate leakage current.
Although existing approaches to forming trench isolation structures for IC devices have been generally adequate for their intended purposes, they have not been entirely satisfactory in all respects.